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DIGITAL I/O
Min
Typ
Max
Unit
Input Voltage HI (V
IH
)
Input Voltage LO (V
IL
)
Input Leakage (I
IH
@ V
IH
= 5 V)
Input Leakage (I
IL
@ V
IL
= 0 V)
Output Voltage HI (V
OH
@ I
OH
=
–
2 mA)
Output Voltage LO (V
OL
@ I
OL
= 2 mA)
Input Capacitance
2.4
V
V
μ
A
μ
A
V
V
pF
0.8
10
10
2.4
0.4
15
DIGITAL TIMING
(Guaranteed over
–
40
°
C to +85
°
C, DV
DD
= AV
DD
= 5 V
±
5%. Refer to Figures 17
–
19.)
Min
Typ
Max
Unit
t
CLKIN
f
CLKIN
t
CPWL
t
CPWH
t
RPWL
t
BPWL
t
BPWH
t
DLYCKB
t
DLYBLR
t
DLYBWR
t
DLYBWF
t
DLYDT
t
SETLRBS
t
DLYLRDT
CLKIN Period
CLKIN Frequency (1/t
CLKIN
)
CLKIN LO Pulsewidth
CLKIN HI Pulsewidth
RESET
LO Pulsewidth
BCLK LO Pulsewidth
BCLK HI Pulsewidth
CLKIN Rise to BCLK Xmit (Master Mode)
BCLK Xmit to L
R
CK Transition (Master Mode)
BCLK Xmit to WCLK Rise
BCLK Xmit to WCLK Fall
BCLK Xmit to DATA/TAG Valid (Master Mode)
L
R
CK Setup to BCLK Sample (Slave Mode)
L
R
CK Transition to DATA/TAG Valid (Slave Mode)
No MSB Delay Mode (for MSB Only)
WCLK Setup to BCLK Sample (Slave Mode)
Data Position Controlled by WCLK Input Mode
BCLK Xmit to DATA/TAG Valid (Slave Mode)
All Bits Except MSB in No MSB Delay Mode
All Bits in MSB Delay Mode
48
1.28
15
15
50
15
15
81
12.288
780
20.48
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
15
10
10
10
10
40
ns
t
SETWBS
10
ns
t
DLYBDT
40
ns
POWER
Min
Typ
Max
Unit
Supplies
Voltage, Analog and Digital
Analog Current
Analog Current
–
Power-Down (CLKIN Running)
Digital Current
Digital Current
–
Power-Down (CLKIN Running)
Dissipation
Operation
–
Both Supplies
Operation
–
Analog Supply
Operation
–
Digital Supply
Power-Down
–
Both Supplies (CLKIN Running)
Power-Down
–
Both Supplies (CLKIN Not Running)
Power Supply Rejection (See TPC 5)
1 kHz 300 mV p-p Signal at Analog Supply Pins
20 kHz 300 mV p-p Signal at Analog Supply Pins
Stop Band (>0.55
×
f
S
)
—
any 300 mV p-p Signal
4.75
5
43
25
9.3
50
5.25
52
V
mA
μ
A
mA
μ
A
12
263
216
47
375
375
315
260
55
mW
mW
mW
μ
W
μ
W
90
68
110
dB
dB
dB
AD1870
REV. A
–3–
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